• Memory 内存知识-14-缓存实现的细节之多处理器支持
  回顾 In the previous section we have already pointed out the problem we have when multiple processors come into play. Even multi-core processors have the problem for those cache levels which are no...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-14-缓存实现的细节之写入行为
  Write Behavior Before we start looking at the cache behavior when multiple execution contexts (threads or processes) use the same memory we have to explore a detail of cache implementations. Cach...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-13-缓存实现的细节之测量缓存效果
  Measurements of Cache Effects All the figures are created by measuring a program which can simulate working sets of arbitrary（随意） size, read and write access, and sequential or random access. We...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-12-缓存实现的细节之关联性
  CPU Cache Implementation Details Cache implementers have the problem that each cell in the huge main memory potentially（可能） has to be cached. If the working set of a program is large enough this ...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-11-数据存储的一生
  存储数据包的一生 最近认认真真学习了一个叫《Life of a Storage Packet》讲座，借助这个讲座将整个存储的过程理解了下，不放过任何一个有疑问的点。 这篇文章算是对讲座的理解和自己收获的总结，同时也为那些对存储系统不够了解又想要了解的初学者，展现一个存储数据包的“生命”。 这个演讲主要聚焦在“整体的存储”，强调存储系统中各个基本元素的关系，并且尽可能简单、清楚地用一种不...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-10-Disk Raid
  磁盘基本知识 磁盘大致由盘片、磁头、步进电机等几部分组成组成。 盘面：硬盘一般含有一个或多个盘片，一个盘片包含两个盘面。 磁道：每个盘面被划成多个狭窄的同心圆环，这样的圆环叫做磁道。 扇区：每个磁道的每段圆弧叫做一个扇区，是读写的最小单位。 柱面：所有盘面上的同一磁道，在竖直方向构成一个圆柱，称为柱面。 读写过程：硬盘读取数据时，磁头先移动到读取扇区所在磁道的上方，这个过程耗时叫...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-09-Operation in High level
  Cache Operation at High Level To understand the costs and savings of using a cache we have to combine the knowledge about the machine architecture and RAM technology from section 2 with the struct...
  2019-05-10 03:08:59 | Memory
• Memory 内存知识-08-大局观中的 cpu caches
  CPU Caches in the Big Picture Before diving into（一头扎进技术细节） technical details of the implementation of CPU caches some readers might find it useful to first see in some more details how caches fit ...
  2019-05-10 03:08:59 | Memory